70 bAVXW9˕A-ӷIOJ&;??I.\aqV֋k+EM&k ܯzG;x.Y HD"D ~`(0 11IE 2ty of /// cases, adjacent edge weights are combined by sorting WeightList and /// combining adjacent weights. However, for very large edge lists an /// auxiliary hash table is used. void normalize(); private: void add(const BlockNode &Node, uint64_t Amount, Weight::DistType Type); }; /// Data about each block. This is used downstream. std::vector Freqs; /// Whether each block is an irreducible loop header. /// This is used downstream. SparseBitVector<> IsIrrLoopHeader; /// Loop data: see initializeLoops(). std::vector Working; /// Indexed information about loops. std::list Loops; /// Virtual destructor. /// /// Need a virtual destructor to mask the compiler warning about /// getBlockName(). virtual ~BlockFrequencyInfoImplBase() = default; /// Add all edges out of a packaged loop to the distribution. /// /// Adds all edges from LocalLoopHead to Dist. Calls addToDist() to add each /// successor edge. // bool invalidate(Function &, const PreservedAnalyses &, FunctionAnalysisManager::Invalidator &) { return false; } /// Returns the largest vectorization factor used in the list of /// vector functions. void getWidestVF(StringRef ScalarF, ElementCount &FixedVF, ElementCount &ScalableVF) const { Impl->getWidestVF(ScalarF, FixedVF, ScalableVF); } /// Check if the function "F" is listed in a library known to LLVM. bool isKnownVectorFunctionInLibrary(StringRef F) const { return this->isFunctionVectorizable(F); } }; /// Analysis pass providing the \c TargetLibraryInfo. /// /// Note that this pass's result cannot be invalidated, it is immutable for the /// life of the module. class TargetLibraryAnalysis : public AnalysisInfoMixin { public: typedef TargetLibraryInfo Result; /// Default construct the library analysis. /// /// This will use the module's triple to construct the library info for that /// module. Target----===// /// \file /// This is the interface for a simple mod/ref and alias analysis over globals. /// //===----------------------------------------------------------------------===// #ifndef LLVM_ANALYSIS_GLOBALSMODREF_H #define LLVM_ANALYSIS_GLOBALSMODREF_H #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/IR/PassManager.h" #include "llvm/IR/ValueHandle.h" #include "llvm/Pass.h" #include namespace llvm { class CallGraph; class Function; /// An alias analysis result set for globals. /// /// This focuses on handling aliasing properties of globals and interprocedural /// function call mod/ref information. class GlobalsAAResult : public AAResultBase { class FunctionInfo; const DataLayout &DL; std::function GetTLI; /// The globals that do not have their addresses taken. SmallPtrSet NonAddressTakenGlobals; /// Are there functions with local linkage that may modify globals. bool UnknownFunctionsWithLocalLinkage = faltPackMax; I < E; ++I) { OB += ", "; OB.CurrentPackIndex = I; Child->print(OB); } } }; class TemplateArgs final : public Node { NodeArray Params; Node *Requires; public: TemplateArgs(NodeArray Params_, Node *Requires_) : Node(KTemplateArgs), Params(Params_), Requires(Requires_) {} template void match(Fn F) const { F(Params, Requires); } NodeArray getParams() { return Params; } void printLeft(OutputBuffer &OB) const override { ScopedOverride LT(OB.GtIsGt, 0); OB += "<"; Params.printWithComma(OB); OB += ">"; // Don't print the requires clause to keep the output simple. } }; /// A forward-reference to a template argument that was not known at the point /// where the template parameter name was parsed in a mangling. /// /// This is created when demangling the name of a specialization of a /// conversion function template: /// /// \code /// struct A { /// template operator T*(); /// }; /// \endcode /// /// Whesition = 0; size_t BufferCapacity = 0; // Ensure there are at least N more positions in the buffer. void grow(size_t N) { size_t Need = N + CurrentPosition; if (Need > BufferCapacity) { // Reduce the number of reallocations, with a bit of hysteresis. The // number here is chosen so the first allocation will more-than-likely not // allocate more than 1K. Need += 1024 - 32; BufferCapacity *= 2; if (BufferCapacity < Need) BufferCapacity = Need; Buffer = static_cast(std::realloc(Buffer, BufferCapacity)); if (Buffer == nullptr) std::abort(); } } OutputBuffer &writeUnsigned(uint64_t N, bool isNeg = false) { std::array Temp; char *TempPtr = Temp.data() + Temp.size(); // Output at least one character. do { *--TempPtr = char('0' + N % 10); N /= 10; } while (N); // Add negative sign. if (isNeg) *--TempPtr = '-'; return operator+=( std::string_view(TempPtr ELF_RELOC(R_ARM_TLS_IE32_FDPIC, 0xa7) #ifndef ELF_RELOC #error "ELF_RELOC must be defined" #endif // These types and values are from the LoongArch ELF psABI which can be found at // https://github.com/loongson/LoongArch-Documentation // and these definitions has been adopted by binutils (include/elf/loongarch.h). // The commit hash (main branch) we reference is: // 9b3bd9f4a497115913c22f1a2a47863798fbc02a ELF_RELOC(R_LARCH_NONE, 0) ELF_RELOC(R_LARCH_32, 1) ELF_RELOC(R_LARCH_64, 2) ELF_RELOC(R_LARCH_RELATIVE, 3) ELF_RELOC(R_LARCH_COPY, 4) ELF_RELOC(R_LARCH_JUMP_SLOT, 5) ELF_RELOC(R_LARCH_TLS_DTPMOD32, 6) ELF_RELOC(R_LARCH_TLS_DTPMOD64, 7) ELF_RELOC(R_LARCH_TLS_DTPREL32, 8) ELF_RELOC(R_LARCH_TLS_DTPREL64, 9) ELF_RELOC(R_LARCH_TLS_TPREL32, 10) ELF_RELOC(R_LARCH_TLS_TPREL64, 11) ELF_: case DW_LANG_Metal: return false; } llvm_unreachable("Unknown language kind."); } inline TypeKind getArrayIndexTypeEncoding(SourceLanguage S) { return isFortran(S) ? DW_ATE_signed : DW_ATE_unsigned; } enum CaseSensitivity { // Identifier case codes DW_ID_case_sensitive = 0x00, DW_ID_up_case = 0x01, DW_ID_down_case = 0x02, DW_ID_case_insensitive = 0x03 }; enum CallingConvention { // Calling convention codes #define HANDLE_DW_CC(ID, NAME) DW_CC_##NAME = ID, #include "llvm/BinaryFormat/Dwarf.def" DW_CC_lo_user = 0x40, DW_CC_hi_user = 0xff }; enum InlineAttribute { // Inline codes DW_INL_not_inlined = 0x00, DW_INL_inlined = 0x01, DW_INL_declared_not_inlined = 0x02, DW_INL_declared_inlined = 0x03 }; enum ArrayDimensionOrdering { // Array ordering DW_ORD_row_major = 0x00, DW_ORD_col_major = 0x01 }; enum DiscriminantList { // Discriminant descriptor values DW_DSC_label = 0x00, DW_DSC_range = 0x01 }; /// Line Number Standard Opcode Encodings. enum LineNumberOpse literal operands, the number and type of which are // implied by the opcode (1). // DW_OP_LLVM_user acts as an extension multiplexer, opening up the encoding // space to accommodate an infinite number of extensions. This better reflects // the de-facto permanent allocation of extensions. HANDLE_DW_OP(0xe9, LLVM_user, -1, -1, 0, LLVM) // "LLVM Vendor Extension" operations under the DW_OP_LLVM_user encoding // scheme. This list is authoritative and exhaustive. Once an operation is // registered here it cannot be removed nor have its encoding changed. The // encoding space must skip zero (which is reserved) and have no gaps. // // The DW_OP_LLVM_user DW_OP_LLVM_nop operation has no effect on the // location stack or any of its values. It is defined as a placeholder for // testing purposes. HANDLE_DW_OP_LLVM_USEROP(0x0001, nop) // DWARF languages. HANDLE_DW_LANG(0x0001, C89, 0, 2, DWARF) HANDLE_DW_LANG(0x0002, C, 0, 2, DWARF) HANDLE_DW_LANG(0x0003, Ada83, 1, 2, DWARF) HANDLE_DW_LANG(0x0004, C_plus_plus, ite"; } llvm_unreachable("Invalid OpenACC Clause kind"); } DefaultValue llvm::acc::getDefaultValue(llvm::StringRef Str) { return llvm::StringSwitch(Str) .Case("present",ACC_Default_present) .Case("none",ACC_Default_none) .Default(ACC_Default_none); } llvm::StringRef llvm::acc::getOpenACCDefaultValueName(llvm::acc::DefaultValue x) { switch (x) { case ACC_Default_present: return "present"; case ACC_Default_none: return "none"; } llvm_unreachable("Invalid OpenACC DefaultValue kind"); } bool llvm::acc::isAllowedClauseForDirective(Directive D, Clause C, unsigned Version) { assert(unsigned(D) <= llvm::acc::Directive_enumSize); assert(unsigned(C) <= llvm::acc::Clause_enumSize); switch (D) { case ACCD_atomic: return false; break; case ACCD_cache: return false; break; case ACCD_data: switch (C) { case ACCC_device_type: return 32 <= Version && 2147483647 >= Version; case ACCC_wait: lvm::omp::Clause::OMPC_num_threads, llvm::omp::Clause::OMPC_order, llvm::omp::Clause::OMPC_proc_bind, llvm::omp::Clause::OMPC_schedule, llvm::omp::Clause::OMPC_thread_limit, }; static OmpClauseSet allowedExclusiveClauses_OMPD_target_teams_distribute_parallel_do { }; static OmpClauseSet requiredClauses_OMPD_target_teams_distribute_parallel_do { }; // Sets for target teams distribute parallel do simd static OmpClauseSet allowedClauses_OMPD_target_teams_distribute_parallel_do_simd { llvm::omp::Clause::OMPC_aligned, llvm::omp::Clause::OMPC_allocate, llvm::omp::Clause::OMPC_depend, llvm::omp::Clause::OMPC_firstprivate, llvm::omp::Clause::OMPC_has_device_addr, llvm::omp::Clause::OMPC_if, llvm::omp::Clause::OMPC_is_device_ptr, llvm::omp::Clause::OMPC_lastprivate, llvm::omp::Clause::OMPC_linear, llvm::omp::Clause::OMPC_map, llvm::omp::Clause::OMPC_nontemporal, llvm::omp::Clause::OMPC_private, llvm::omp::Clause::OMPC_reduction, lef OMP_Parallel : Directive<"parallel"> { let allowedClauses = [ VersionedClause, VersionedClause, VersionedClause, VersionedClause, VersionedClause, VersionedClause, VersionedClause, ]; let allowedOnceClauses = [ VersionedClause, VersionedClause, VersionedClause, VersionedClause, ]; let association = AS_Block; let category = CA_Executable; } def OMP_Requires : Directive<"requires"> { let allowedOnceClauses = [ VersionedClause, VersionedClause, // OpenMP 5.2 Spec: If an implementation is not supporting a requirement // (reverse offload in this case) then it should give compile-time error // termination. // Seeting supported version for reverse_offload to a distant future version // 9.9 so that its partial support ca8_t> opcodes, bool is64Bit); int32_t segmentIndex() const; uint64_t segmentOffset() const; StringRef typeName() const; StringRef segmentName() const; StringRef sectionName() const; uint64_t address() const; bool operator==(const MachORebaseEntry &) const; void moveNext(); private: friend class MachOObjectFile; void moveToFirst(); void moveToEnd(); uint64_t readULEB128(const char **error); Error *E; const MachOObjectFile *O; ArrayRef Opcodes; const uint8_t *Ptr; uint64_t SegmentOffset = 0; int32_t SegmentIndex = -1; uint64_t RemainingLoopCount = 0; uint64_t AdvanceAmount = 0; uint8_t RebaseType = 0; uint8_t PointerSize; bool Done = false; }; using rebase_iterator = content_iterator; /// MachOBindEntry encapsulates the current state in the decompression of /// binding opcodes. This allows you to iterate through the compressed table of /// bindings using: /// Error Err = Error::success(); /// for (const llvm::object::Machions is stored in // VirtualAddress field of the first relocation table entry. bool hasExtendedRelocations() const { return (Characteristics & COFF::IMAGE_SCN_LNK_NRELOC_OVFL) && NumberOfRelocations == UINT16_MAX; } uint32_t getAlignment() const { // The IMAGE_SCN_TYPE_NO_PAD bit is a legacy way of getting to // IMAGE_SCN_ALIGN_1BYTES. if (Characteristics & COFF::IMAGE_SCN_TYPE_NO_PAD) return 1; // Bit [20:24] contains section alignment. 0 means use a default alignment // of 16. uint32_t Shift = (Characteristics >> 20) & 0xF; if (Shift > 0) return 1U << (Shift - 1); return 16; } }; struct coff_relocation { support::ulittle32_t VirtualAddress; support::ulittle32_t SymbolTableIndex; support::ulittle16_t Type; }; struct coff_aux_function_definition { support::ulittle32_t TagIndex; support::ulittle32_t TotalSize; support::ulittle32_t PointerToLinenumber; support::ulittle32_t PointerToNextFunction; char Unused1[2]; }; static_ection_iterator section_end() const override; Expected getRelocationAddend(DataRefImpl Rel) const override; uint8_t getBytesInAddress() const override; StringRef getFileFormatName() const override; Triple::ArchType getArch() const override; Triple::OSType getOS() const override; Expected getStartAddress() const override; unsigned getPlatformFlags() const override { return EF.getHeader().e_flags; } const ELFFile &getELFFile() const { return EF; } bool isDyldType() const { return isDyldELFObject; } static bool classof(const Binary *v) { return v->getType() == getELFType(ELFT::Endianness == llvm::endianness::little, ELFT::Is64Bits); } elf_symbol_iterator_range getDynamicSymbolIterators() const override; bool isRelocatableObject() const override; void createFakeSections() { EF.createFakeSections(); } StringRef getCrelDecodeProblem(DataRefImpl Sec) const; }; using ELF32LEObjectFile = ELFObjectFile; using ngTable; /// The fragment that ultimately holds our strings. MCDataFragment *StrTabFragment = nullptr; SmallVector StrTab = {'\0'}; /// Get a string table offset. unsigned getStringTableOffset(StringRef S); struct FileInfo { unsigned StringTableOffset; // Indicates if this FileInfo corresponds to an actual file, or hasn't been // set yet. bool Assigned = false; uint8_t ChecksumKind; ArrayRef Checksum; // Checksum offset stored as a symbol because it might be requested // before it has been calculated, so a fixup may be needed. MCSymbol *ChecksumTableOffset; }; /// Array storing added file information. SmallVector Files; /// The offset of the first and last .cv_loc directive for a given function /// id. std::map> MCCVLineStartStop; /// A collection of MCCVLoc for each section. std::vector MCCVLines; /// All known functions and inlined call sites, indexed by fu using VersionInfoType = struct { bool EmitBuildVersion; union { MCVersionMinType Type; ///< Used when EmitBuildVersion==false. MachO::PlatformType Platform; ///< Used when EmitBuildVersion==true. } TypeOrPlatform; unsigned Major; unsigned Minor; unsigned Update; /// An optional version of the SDK that was used to build the source. VersionTuple SDKVersion; }; private: /// Helper struct for containing some precomputed information on symbols. struct MachSymbolData { const MCSymbol *Symbol; uint64_t StringIndex; uint8_t SectionIndex; // Support lexicographic sorting. bool operator<(const MachSymbolData &RHS) const; }; struct IndirectSymbolData { MCSymbol *Symbol; MCSection *Section; }; /// The target specific Mach-O writer instance. std::unique_ptr TargetObjectWriter; /// \name Relocation Data /// @{ struct RelAndSymbol { const MCSymbol *Sym; MachO::any_relocation_info MRE;itAssignment(MCSymbol *Symbol, const MCExpr *Value); virtual void prettyPrintAsm(MCInstPrinter &InstPrinter, uint64_t Address, const MCInst &Inst, const MCSubtargetInfo &STI, raw_ostream &OS); virtual void emitDwarfFileDirective(StringRef Directive); /// Update streamer for a new active section. /// /// This is called by popSection and switchSection, if the current /// section changes. virtual void changeSection(const MCSection *CurSection, MCSection *Section, uint32_t SubSection, raw_ostream &OS); virtual void emitValue(const MCExpr *Value); /// Emit the bytes in \p Data into the output. /// /// This is used to emit bytes in \p Data as sequence of .byte directives. virtual void emitRawBytes(StringRef Data); virtual void emitConstantPools(); virtual void finish(); }; // FIXME: declared here because it is used from // lib/CodeGen/AsmPrinter/ARMException.cpp. class ARMTargetStreamer : pub LLVM_MC_MCOBJECTWRITER_H #include "llvm/MC/MCSymbol.h" #include "llvm/TargetParser/Triple.h" #include namespace llvm { class MCAssembler; class MCFixup; class MCFragment; class MCSymbol; class MCSymbolRefExpr; class MCValue; /// Defines the object file and target independent interfaces used by the /// assembler backend to write native file format object files. /// /// The object writer contains a few callbacks used by the assembler to allow /// the object writer to modify the assembler data structures at appropriate /// points. Once assembly is complete, the object writer is given the /// MCAssembler instance, which contains all the symbol and section data which /// should be emitted as part of writeObject(). class MCObjectWriter { protected: /// List of declared file names SmallVector, 0> FileNames; // XCOFF specific: Optional compiler version. std::string CompilerVersion; std::vector AddrsigSyms; bool EmitAddrsigSection = false; bf a directed graph in reverse topological order /// of the SCC DAG. /// /// This is implemented using Tarjan's DFS algorithm using an internal stack to /// build up a vector of nodes in a particular SCC. Note that it is a forward /// iterator and thus you cannot backtrack or re-visit nodes. template > class scc_iterator : public iterator_facade_base< scc_iterator, std::forward_iterator_tag, const std::vector, ptrdiff_t> { using NodeRef = typename GT::NodeRef; using ChildItTy = typename GT::ChildIteratorType; using SccTy = std::vector; using reference = typename scc_iterator::reference; /// Element of VisitStack during DFS. struct StackElement { NodeRef Node; ///< The current node pointer. ChildItTy NextChild; ///< The next child, modified inplace during DFS. unsigned MinVisited; ///< Minimum uplink value of all children of Node. Stackosensing using /// extended C rules: 0 is octal, 0x is hex, 0b is binary. /// /// If the string does not begin with a number of the specified radix, /// this returns true to signify the error. The string is considered /// erroneous if empty. /// The portion of the string representing the discovered numeric value /// is removed from the beginning of the string. bool consumeInteger(unsigned Radix, APInt &Result); /// Parse the current string as an IEEE double-precision floating /// point value. The string must be a well-formed double. /// /// If \p AllowInexact is false, the function will fail if the string /// cannot be represented exactly. Otherwise, the function only fails /// in case of an overflow or underflow, or an invalid floating point /// representation. bool getAsDouble(double &Result, bool AllowInexact = true) const; /// @} /// @name String Operations /// @{ // Convert the given ASCII string to lowercase. [[nodifined(__GNUC__) return __builtin_ctzll(Val); #elif defined(_MSC_VER) unsigned long Index; _BitScanForward64(&Index, Val); return Index; #endif } }; #endif #endif } // namespace detail /// Count number of 0's from the least significant bit to the most /// stopping at the first 1. /// /// Only unsigned integral types are allowed. /// /// Returns std::numeric_limits::digits on an input of 0. template [[nodiscard]] int countr_zero(T Val) { static_assert(std::is_unsigned_v, "Only unsigned integral types are allowed."); return llvm::detail::TrailingZerosCounter::count(Val); } namespace detail { template struct LeadingZerosCounter { static unsigned count(T Val) { if (!Val) return std::numeric_limits::digits; // Bisection method. unsigned ZeroBits = 0; for (T Shift = std::numeric_limits::digits >> 1; Shift; Shift >>= 1) { T Tmp = Val >> Shift; if (Tmp) Val = That is handled when the divergent // condition is placed in the worklist. if (I.isTerminator()) break; markDivergent(I); } } /// Mark divergent phi nodes in a join block template void GenericUniformityAnalysisImpl::taintAndPushPhiNodes( const BlockT &JoinBlock) { LLVM_DEBUG(dbgs() << "taintAndPushPhiNodes in " << Context.print(&JoinBlock) << "\n"); for (const auto &Phi : JoinBlock.phis()) { // FIXME: The non-undef value is not constant per se; it just happens to be // uniform and may not dominate this PHI. So assuming that the same value // reaches along all incoming edges may itself be undefined behaviour. This // particular interpretation of the undef value was added to // DivergenceAnalysis in the following review: // // https://reviews.llvm.org/D19013 if (ContextT::isConstantOrUndefValuePhi(Phi)) continue; markDivergent(Phi); } } /// Add \p Candidate to \p Cycles if it is not alreadh a value. It is expected to be used with common nullable /// types like pointers or optionals. /// /// Internally this uses a vector to store the worklist and a map to identify /// existing elements in the worklist. Both of these may be customized, but the /// map must support the basic DenseMap API for mapping from a T to an integer /// index into the vector. /// /// A partial specialization is provided to automatically select a SmallVector /// and a SmallDenseMap if custom data structures are not provided. template , typename MapT = DenseMap> class PriorityWorklist { public: using value_type = T; using key_type = T; using reference = T&; using const_reference = const T&; using size_type = typename MapT::size_type; /// Construct an empty PriorityWorklist PriorityWorklist() = default; /// Determine if the PriorityWorklist is empty or not. bool empty() const { return V.empty(); } /// Returns the number of elemenputIt It = First; It != Last; ++It) insert(*It); } /// Inserts elements from initializer list ilist. If multiple elements in /// the range have keys that compare equivalent, it is unspecified which /// element is inserted void insert(std::initializer_list> List) { insert(List.begin(), List.end()); } /// Inserts an element or assigns to the current element if the key already /// exists. The return type is the same as try_emplace. template std::pair insert_or_assign(StringRef Key, V &&Val) { auto Ret = try_emplace(Key, std::forward(Val)); if (!Ret.second) Ret.first->second = std::forward(Val); return Ret; } /// Emplace a new element for the specified key into the map if the key isn't /// already in the map. The bool component of the returned pair is true /// if and only if the insertion takes place, and the iterator component of /// the pair points to the element with key equivalent to ) { AddInteger(B ? 1U : 0U); } void AddString(StringRef String); void AddNodeID(const FoldingSetNodeID &ID); template inline void Add(const T &x) { FoldingSetTrait::Profile(x, *this); } /// clear - Clear the accumulated profile, allowing this FoldingSetNodeID /// object to be used to compute a new profile. inline void clear() { Bits.clear(); } // Compute a strong hash value for this FoldingSetNodeID, used to lookup the // node in the FoldingSetBase. The hash value is not guaranteed to be // deterministic across processes. unsigned ComputeHash() const { return FoldingSetNodeIDRef(Bits.data(), Bits.size()).ComputeHash(); } // Compute a deterministic hash value across processes that is suitable for // on-disk serialization. unsigned computeStableHash() const { return FoldingSetNodeIDRef(Bits.data(), Bits.size()).computeStableHash(); } /// operator== - Used to compare two nodes to each other. bool operator==(const FoldingSetNodeID &RHS) const; boo==0. Optimize the // case. if (this == &RHS) return *this; if (RHS.empty()) { this->destroy_range(this->begin(), this->end()); this->Size = 0; } else { this->assignRemote(std::move(RHS)); } return *this; } SmallVector &operator=(SmallVectorImpl &&RHS) { SmallVectorImpl::operator=(::std::move(RHS)); return *this; } SmallVector &operator=(std::initializer_list IL) { this->assign(IL); return *this; } }; template inline size_t capacity_in_bytes(const SmallVector &X) { return X.capacity_in_bytes(); } template using ValueTypeFromRangeType = std::remove_const_t()))>>; /// Given a range of type R, iterate the entire range and return a /// SmallVector with elements of the vector. This is useful, for example, /// when you want to iterate a range and then sort the results. template Ptrs, const AbstractAttribute &QueryingAA, const Instruction *CtxI); } // namespace AA template <> struct DenseMapInfo : public DenseMapInfo { using Base = DenseMapInfo; static inline AA::ValueAndContext getEmptyKey() { return Base::getEmptyKey(); } static inline AA::ValueAndContext getTombstoneKey() { return Base::getTombstoneKey(); } static unsigned getHashValue(const AA::ValueAndContext &VAC) { return Base::getHashValue(VAC); } static bool isEqual(const AA::ValueAndContext &LHS, const AA::ValueAndContext &RHS) { return Base::isEqual(LHS, RHS); } }; template <> struct DenseMapInfo : public DenseMapInfo { using Base = DenseMapInfo; static inline AA::ValueScope getEmptyKey() { return As that we have already vectorized. BitVector UsedLanes; /// Tracks used lanes for constant-time accessor. unsigned UsedLaneCount = 0; /// Tracks the remaining bits available to vectorize unsigned NumUnusedBits = 0; public: #ifndef NDEBUG void dump(raw_ostream &OS) const { for (auto [ElmIdx, I] : enumerate(*this)) { OS.indent(2) << ElmIdx << ". "; if (isUsed(ElmIdx)) OS << "[USED]"; else OS << *I; OS << "\n"; } } LLVM_DUMP_METHOD void dump() const { dump(dbgs()); dbgs() << "\n"; } #endif // NDEBUG }; /// Specialization of SeedBundle for memory access instructions. Keeps /// seeds sorted in ascending memory order, which is convenient for slicing /// these bundles into vectorizable groups. template class MemSeedBundle : public SeedBundle { public: explicit MemSeedBundle(SmallVector &&SV, ScalarEvolution &SE) : SeedBundle(std::move(SV)) { static_assert(std::is_sameodule; /// Class to handle necessary GlobalValue changes required by ThinLTO /// function importing, including linkage changes and any necessary renaming. class FunctionImportGlobalProcessing { /// The Module which we are exporting or importing functions from. Module &M; /// Module summary index passed in for function importing/exporting handling. const ModuleSummaryIndex &ImportIndex; /// Globals to import from this module, all other functions will be /// imported as declarations instead of definitions. SetVector *GlobalsToImport; /// Set to true if the given ModuleSummaryIndex contains any functions /// from this source module, in which case we must conservatively assume /// that any of its functions may be imported into another module /// as part of a different backend compilation process. bool HasExportedFunctions = false; /// Set to true (only applicatable to ELF -fpic) if dso_local should be /// dropped for a declaration. /// /// On ELF, the assembler substituteInParent(Instruction *I, Value *With) { replaceAllUsesWith(I, With); eraseFromParent(I); } public: LibCallSimplifier( const DataLayout &DL, const TargetLibraryInfo *TLI, DominatorTree *DT, DomConditionCache *DC, AssumptionCache *AC, OptimizationRemarkEmitter &ORE, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, function_ref Replacer = &replaceAllUsesWithDefault, function_ref Eraser = &eraseFromParentDefault); /// optimizeCall - Take the given call instruction and return a more /// optimal value to replace the instruction with or 0 if a more /// optimal form can't be found. Note that the returned value may /// be equal to the instruction being optimized. In this case all /// other instructions that use the given instruction were modified /// and the given instruction is dead. /// The call must not be an indirect call. Value *optimizeCall(CallInst *CI, IRBuilderBase &B); // This pass iteratively simplifies the entire CFG of a function. It may change /// or remove control flow to put the CFG into a canonical form expected by /// other passes of the mid-level optimizer. Depending on the specified options, /// it may further optimize control-flow to create non-canonical forms. class SimplifyCFGPass : public PassInfoMixin { SimplifyCFGOptions Options; public: /// The default constructor sets the pass options to create canonical IR, /// rather than optimal IR. That is, by default we bypass transformations that /// are likely to improve performance but make analysis for other passes more /// difficult. SimplifyCFGPass(); /// Construct a pass with optional optimizations. SimplifyCFGPass(const SimplifyCFGOptions &PassOptions); /// Run the pass over the function. PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); void printPipeline(raw_ostream &OS, function_ref MapClassName2PassName); }ne LLVM_TRANSFORMS_INSTRUMENTATION_CFGMST_H #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Analysis/BlockFrequencyInfo.h" #include "llvm/Analysis/BranchProbabilityInfo.h" #include "llvm/Analysis/CFG.h" #include "llvm/Analysis/LoopInfo.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/IntrinsicInst.h" #include "llvm/Support/BranchProbability.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include #include #define DEBUG_TYPE "cfgmst" namespace llvm { /// An union-find based Minimum Spanning Tree for CFG /// /// Implements a Union-find algorithm to compute Minimum Spanning Tree /// for a given CFG. template class CFGMST { Function &F; // Store all the edges in CFG. It may contain some stale edges // when Removed is set. std::vector> AllEdges; // This map records the auxiliary information for each BB. DenseMap " << BlockNamePrinter(To) << "\n"); #if LLVM_ENABLE_ABI_BREAKING_CHECKS // Ensure that the edge was in fact deleted from the CFG before informing // the DomTree about it. // The check is O(N), so run it only in debug configuration. auto IsSuccessor = [BUI](const NodePtr SuccCandidate, const NodePtr Of) { auto Successors = getChildren(Of, BUI); return llvm::is_contained(Successors, SuccCandidate); }; (void)IsSuccessor; assert(!IsSuccessor(To, From) && "Deleted edge still exists in the CFG!"); #endif const TreeNodePtr FromTN = DT.getNode(From); // Deletion in an unreachable subtree -- nothing to do. if (!FromTN) return; espace fs } // namespace sys /// This interface provides simple read-only access to a block of memory, and /// provides simple methods for reading files and standard input into a memory /// buffer. In addition to basic access to the characters in the file, this /// interface guarantees you can read one character past the end of the file, /// and that this character will read as '\0'. /// /// The '\0' guarantee is needed to support an optimization -- it's intended to /// be more efficient for clients which are reading all the data to stop /// reading when they encounter a '\0' than to continually check the file /// position to see if it has reached the end of the file. class MemoryBuffer { const char *BufferStart; // Start of the buffer. const char *BufferEnd; // End of the buffer. protected: MemoryBuffer() = default; void init(const char *BufStart, const char *BufEnd, bool RequiresNullTerminator); public: MemoryBuffer(const MemoryBuffer &) = delete; MemoryBuffer &operator=(const) /// and update the offset pointed to by \a offset_ptr. The size of /// the extracted integer is specified by the \a byte_size argument. /// \a byte_size should have a value greater than or equal to one /// and less than or equal to eight since the return value is 64 /// bits wide. Any \a byte_size values less than 1 or greater than /// 8 will result in nothing being extracted, and zero being returned. /// /// @param[in,out] offset_ptr /// A pointer to an offset within the data that will be advanced /// by the appropriate number of bytes if the value is extracted /// correctly. If the offset is out of bounds or there are not /// enough bytes to extract this value, the offset will be left /// unmodified. /// /// @param[in] size /// The size in bytes of the integer to extract. /// /// @return /// The sign extended signed integer value that was extracted, /// or zero on failure. int64_t getSigned(uint64_t *offset_ptr, uint32_t size) constE_H #define LLVM_SUPPORT_SUFFIXTREE_NODE_H #include "llvm/ADT/DenseMap.h" namespace llvm { /// A node in a suffix tree which represents a substring or suffix. struct SuffixTreeNode { public: /// Represents an undefined index in the suffix tree. static const unsigned EmptyIdx = -1; enum class NodeKind { ST_Leaf, ST_Internal }; private: const NodeKind Kind; /// The start index of this node's substring in the main string. unsigned StartIdx = EmptyIdx; /// The length of the string formed by concatenating the edge labels from /// the root to this node. unsigned ConcatLen = 0; /// These two indices give a range of indices for its leaf descendants. /// Imagine drawing a tree on paper and assigning a unique index to each leaf /// node in monotonically increasing order from left to right. This way of /// numbering the leaf nodes allows us to associate a continuous range of /// indices with each internal node. For example, if a node has leaf /// descendants with indices i, i+1, ..., DataType>(V), HelpStr); Values.push_back(X); AddLiteralOption(Owner, Name); } /// Remove the specified option. /// void removeLiteralOption(StringRef Name) { unsigned N = findOption(Name); assert(N != Values.size() && "Option not found!"); Values.erase(Values.begin() + N); } }; //-------------------------------------------------- // Super class of parsers to provide boilerplate code // class basic_parser_impl { // non-template implementation of basic_parser public: basic_parser_impl(Option &) {} virtual ~basic_parser_impl() = default; enum ValueExpected getValueExpectedFlagDefault() const { return ValueRequired; } void getExtraOptionNames(SmallVectorImpl &) {} void initialize() {} // Return the width of the option tag for printing... size_t getOptionWidth(const Option &O) const; // Print out information about this option. The to-be-maintained width is // specified. // void printOptionInfo(const Option &O, size_t GlobalWidth) conster is often /// defined by an IMPLICIT_DEF, because it is commonly used to implement /// anyext operations on target architectures which support it. HANDLE_TARGET_OPCODE(INSERT_SUBREG) /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef. HANDLE_TARGET_OPCODE(IMPLICIT_DEF) /// Explicit undef initialization used past IMPLICIT_DEF elimination in cases /// where an undef operand must be allocated to a different register than an /// early-clobber result operand. HANDLE_TARGET_OPCODE(INIT_UNDEF) /// SUBREG_TO_REG - Assert the value of bits in a super register. /// The result of this instruction is the value of the second operand inserted /// into the subregister specified by the third operand. All other bits are /// assumed to be equal to the bits in the immediate integer constant in the /// first operand. This instruction just communicates information; No code /// should be generated. /// This is typically used after an instruction where the write to a subregister /// implicitly cleared the biugTypes - Set the current debug type, as if the /// -debug-only=X,Y,Z option were specified. Note that DebugFlag /// also needs to be set to true for debug output to be produced. /// void setCurrentDebugTypes(const char **Types, unsigned Count); /// DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug /// information. If the '-debug' option is specified on the commandline, and if /// this is a debug build, then the code specified as the option to the macro /// will be executed. Otherwise it will not be. Example: /// /// DEBUG_WITH_TYPE("bitset", dbgs() << "Bitset contains: " << Bitset << "\n"); /// /// This will emit the debug information if -debug is present, and -debug-only /// is not specified, or is specified as "bitset". #define DEBUG_WITH_TYPE(TYPE, ...) \ do { \ if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { \ __VA_ARGS__; false, if it doesn't exist. template bool isLegalToHoistInto(BlockT *Block) { if constexpr (detect_has_hoist_check::value) return Block->isLegalToHoistInto(); return false; } } // namespace detail /// getLoopPreheader - If there is a preheader for this loop, return it. A /// loop has a preheader if there is only one edge to the header of the loop /// from outside of the loop and it is legal to hoist instructions into the /// predecessor. If this is the case, the block branching to the header of the /// loop is the preheader node. /// /// This method returns null if there is no preheader for the loop. /// template BlockT *LoopBase::getLoopPreheader() const { assert(!isInvalid() && "Loop not in a valid state!"); // Keep track of nodes outside the loop branching to the header... BlockT *Out = getLoopPredecessor(); if (!Out) return nullptr; // Make sure we are allowed to hoist instructions into the predecessor. if (!detaot the same function as implemented by the ADDG instruction! // Backend optimizations may change tag_offset; the only guarantee is that calls // to tagp with the same pair of (baseptr, tag_offset) will produce pointers // with the same tag value, assuming the set of excluded tags has not changed. // Address bits in baseptr and tag bits in ptr0 are ignored. // When offset between ptr0 and baseptr is a compile time constant, this can be emitted as // ADDG ptr1, baseptr, (ptr0 - baseptr), tag_offset // It is intended that ptr0 is an alloca address, and baseptr is the direct output of llvm.aarch64.irg.sp. def int_aarch64_tagp : DefaultAttrsIntrinsic<[llvm_anyptr_ty], [LLVMMatchType<0>, llvm_ptr_ty, llvm_i64_ty], [IntrNoMem, ImmArg>]>; // Update allocation tags for the memory range to match the tag in the pointer argument. def int_aarch64_settag : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_i64_ty], [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>; S << V; } First = true; OS << " StackIds: "; for (auto Id : SNI.StackIdIndices) { if (!First) OS << ", "; First = false; OS << Id; } return OS; } // Allocation type assigned to an allocation reached by a given context. // More can be added, now this is cold, notcold and hot. // Values should be powers of two so that they can be ORed, in particular to // track allocations that have different behavior with different calling // contexts. enum class AllocationType : uint8_t { None = 0, NotCold = 1, Cold = 2, Hot = 4, All = 7 // This should always be set to the OR of all values. }; /// Summary of a single MIB in a memprof metadata on allocations. struct MIBInfo { // The allocation type for this profiled context. AllocationType AllocType; // Represents stack ids in this context, recorded as indices into the // StackIds vector in the summary index, which in turn holds the full 64-bit // stack ids. This reduces memory as there are in practice far fewer unique // es run(Function &F, FunctionAnalysisManager &AM); static bool isRequired() { return true; } }; /// Enables verification of dominator trees. /// /// This check is expensive and is disabled by default. `-verify-dom-info` /// allows selectively enabling the check without needing to recompile. extern bool VerifyDomInfo; /// Legacy analysis pass which computes a \c DominatorTree. class DominatorTreeWrapperPass : public FunctionPass { DominatorTree DT; public: static char ID; DominatorTreeWrapperPass(); DominatorTree &getDomTree() { return DT; } const DominatorTree &getDomTree() const { return DT; } bool runOnFunction(Function &F) override; void verifyAnalysis() const override; void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesAll(); } void releaseMemory() override { DT.reset(); } void print(raw_ostream &OS, const Module *M = nullptr) const override; }; } // end namespace llvm #endif // LLVM_IR_DOMINATORS_H //===- CmpPredicate.h - CmpInst Predicate witha *Allocated, Metadata *Rank, Metadata *Annotations, Metadata *Specification, uint32_t NumExtraInhabitants, StorageType Storage, bool ShouldCreate = true); TempDICompositeType cloneImpl() const { return getTemporary( getContext(), getTag(), getName(), getFile(), getLine(), getScope(), getBaseType(), getSizeInBits(), getAlignInBits(), getOffsetInBits(), getFlags(), getElements(), getRuntimeLang(), getVTableHolder(), getTemplateParams(), getIdentifier(), getDiscriminator(), getRawDataLocation(), getRawAssociated(), getRawAllocated(), getRawRank(), getAnnotations(), getSpecification(), getNumExtraInhabitants()); } public: DEFINE_MDNODE_GET( DICompositeType, (unsigned Tag, StringRef Name, DIFile *File, unsigned Line, DIScope *Scope, DIType *BaseType, uint64_t SizeInBits, uint32_t AlignInBits, uint64_t OffsetInBits, DIFlags Flags, DINodeArray Elements, unsigned RuntimeLang, DIType *VTareturn !operator==(CRL); } /// Print out the ranges to a stream. void print(raw_ostream &OS) const; #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() const; #endif }; } // end namespace llvm #endif // LLVM_IR_CONSTANTRANGELIST_H //===----------------------------------------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // Automatically generated file, do not edit! //===----------------------------------------------------------------------===// // tag : A2_abs class Hexagon_i32_i32_Intrinsic intr_properties = [IntrNoMem]> : Hexagon_Intrinsic; // tag : A2_absp class Hexagon_i64_i64_Intrinmation is available, this is the number of times the /// corresponding code was executed in a profile instrumentation run. std::optional Hotness; /// Arguments collected via the streaming interface. SmallVector Args; /// The remark is expected to be noisy. bool IsVerbose = false; /// If positive, the index of the first argument that only appear in /// the optimization records and not in the remark printed in the compiler /// output. int FirstExtraArgIndex = -1; }; /// Allow the insertion operator to return the actual remark type rather than a /// common base class. This allows returning the result of the insertion /// directly by value, e.g. return OptimizationRemarkAnalysis(...) << "blah". template RemarkT & operator<<(RemarkT &R, std::enable_if_t< std::is_base_of::value, StringRef> S) { R.insert(S); return R; } /// Also allow r-value for the re LLVMMatchType<1>], [NoCapture>, ImmArg>, IntrReadMem, IntrArgMemOnly]>, RISCVVIntrinsic { let VLOperand = 2; } // For unit stride segment load with mask // Input: (maskedoff, pointer, mask, vl, policy, sew) class RISCVUSSegLoadMasked : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_ptr_ty, llvm_anyvector_ty, llvm_anyint_ty, LLVMMatchType<2>, LLVMMatchType<2>], [ImmArg>, ImmArg>, NoCapture>, IntrReadMem, IntrArgMemOnly]>, RISCVVIntrinsic { let VLOperand = 3; } // For unit stride fault-only-first segment load // Input: (passthru, pointer, vl, sew) // Output: (data, vl) // NOTE: We model this with default memory properties since we model writing // VL as a side effect. IntrReadMem, IntrHasSideEffects does not work. clasw(size_t S) { return User::operator new(S, AllocMarker); } void operator delete(void *Ptr) { User::operator delete(Ptr); } /// Provide fast operand accessors DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant); void copyAttributesFrom(const GlobalAlias *Src) { GlobalValue::copyAttributesFrom(Src); } /// removeFromParent - This method unlinks 'this' from the containing module, /// but does not delete it. /// void removeFromParent(); /// eraseFromParent - This method unlinks 'this' from the containing module /// and deletes it. /// void eraseFromParent(); /// These methods retrieve and set alias target. void setAliasee(Constant *Aliasee); const Constant *getAliasee() const { return static_cast(Op<0>().get()); } Constant *getAliasee() { return static_cast(Op<0>().get()); } const GlobalObject *getAliaseeObject() const; GlobalObject *getAliaseeObject() { return const_cast( static_cast(this)->g const Function &IR); extern template class PassManager; /// Convenience typedef for a pass manager over functions. using FunctionPassManager = PassManager; /// A container for analyses that lazily runs them and caches their /// results. /// /// This class can manage analyses for any IR unit where the address of the IR /// unit sufficies as its identity. template class AnalysisManager { public: class Invalidator; private: // Now that we've defined our invalidator, we can define the concept types. using ResultConceptT = detail::AnalysisResultConcept; using PassConceptT = detail::AnalysisPassConcept; /// List of analysis pass IDs and associated concept pointers. /// /// Requires iterators to be valid across appending new entries and arbitrary /// erases. Provides the analysis ID to enable finding iterators to a given /// entry in maps below, and provides the storeturn nullptr; return dyn_cast_or_null(Node->getOperand(1)); } StringRef getName() const { if (Node->getNumOperands() > 2) if (MDString *N = dyn_cast_or_null(Node->getOperand(2))) return N->getString(); return StringRef(); } }; /// Typed iterator through MDNode operands. /// /// An iterator that transforms an \a MDNode::iterator into an iterator over a /// particular Metadata subclass. template class TypedMDOperandIterator { MDNode::op_iterator I = nullptr; public: using iterator_category = std::input_iterator_tag; using value_type = T *; using difference_type = std::ptrdiff_t; using pointer = void; using reference = T *; TypedMDOperandIterator() = default; explicit TypedMDOperandIterator(MDNode::op_iterator I) : I(I) {} T *operator*() const { return cast_or_null(*I); } TypedMDOperandIterator &operator++() { ++I; return *this; } TypedMDOperandIterator operator++(int) { TypedMDOperandIterator Temp(*this); m/ADT/StringRef.h" #include "llvm/ADT/ilist_node.h" #include "llvm/ADT/iterator_range.h" #include "llvm/IR/Constant.h" #include "llvm/IR/LLVMContext.h" #include "llvm/IR/Value.h" #include "llvm/Support/CBindingWrapping.h" #include "llvm/Support/Casting.h" #include "llvm/Support/ErrorHandling.h" #include #include #include #include #include #include #include #include namespace llvm { class Module; class ModuleSlotTracker; class raw_ostream; class DbgVariableRecord; template class StringMapEntry; template class StringMapEntryStorage; class Type; enum LLVMConstants : uint32_t { DEBUG_METADATA_VERSION = 3 // Current debug info version number. }; /// Magic number in the value profile metadata showing a target has been /// promoted for the instruction and shouldn't be promoted again. const uint64_t NOMORE_ICP_MAGICNUM = -1; /// Root of the metadata hierarchy. /// /// This is a root class for typeef GET_INTRINSIC_TARGET_DATA struct IntrinsicTargetInfo { StringLiteral Name; size_t Offset; size_t Count; }; static constexpr IntrinsicTargetInfo TargetInfos[] = { {"", 0, 488}, {"aarch64", 488, 1579}, {"amdgcn", 2067, 1255}, {"arm", 3322, 491}, {"bpf", 3813, 12}, {"dx", 3825, 55}, {"hexagon", 3880, 2051}, {"loongarch", 5931, 1514}, {"mips", 7445, 671}, {"nvvm", 8116, 1797}, {"ppc", 9913, 626}, {"r600", 10539, 35}, {"riscv", 10574, 713}, {"s390", 11287, 258}, {"spv", 11545, 74}, {"ve", 11619, 1263}, {"wasm", 12882, 73}, {"x86", 12955, 1802}, {"xcore", 14757, 53}, }; #endif // Intrinsic ID to name table. #ifdef GET_INTRINSIC_NAME_TABLE // Note that entry #0 is the invalid intrinsic! #ifdef __GNUC__ #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Woverlength-strings" #endif static constexpr char IntrinsicNameTableStorage[] = { '\0', 'n', 'o', 't', '_', 'i', 'n', 't', 'r', 'i', 'n', 's', 'i', 'c', '\0', 'l', 'l', 'v', 'm', '.', 'a', 'b', 's', '\0===// // Matchers for specific binary operators. // template struct BinaryOp_match { LHS_t L; RHS_t R; // The evaluation order is always stable, regardless of Commutability. // The LHS is always matched first. BinaryOp_match(const LHS_t &LHS, const RHS_t &RHS) : L(LHS), R(RHS) {} template inline bool match(unsigned Opc, OpTy *V) { if (V->getValueID() == Value::InstructionVal + Opc) { auto *I = cast(V); return (L.match(I->getOperand(0)) && R.match(I->getOperand(1))) || (Commutable && L.match(I->getOperand(1)) && R.match(I->getOperand(0))); } return false; } template bool match(OpTy *V) { return match(Opcode, V); } }; template inline BinaryOp_match m_Add(const LHS &L, const RHS &R) { return Binaryr arm_vcvtru, // llvm.arm.vcvtru }; // enum } // namespace llvm::Intrinsic #endif //===- llvm/SymbolTableListTraits.h - Traits for iplist ---------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file defines a generic class that is used to implement the automatic // symbol table manipulation that occurs when you put (for example) a named // instruction into a basic block. // // The way that this is implemented is by using a special traits class with the // intrusive list that makes up the list of instructions in a basic block. When // a new element is added to the list of instructions, the traits class is // notified, allowing the symbol table to be updated. // // This generic class implements the traits class.trinsic. bool isNonContinuableTrap() const { switch (getIntrinsicID()) { case Intrinsic::trap: case Intrinsic::ubsantrap: return !hasFnAttr("trap-func-name"); default: return false; } } // Methods for support type inquiry through isa, cast, and dyn_cast: static bool classof(const Instruction *I) { return I->getOpcode() == Instruction::Call; } static bool classof(const Value *V) { return isa(V) && classof(cast(V)); } /// Updates profile metadata by scaling it by \p S / \p T. void updateProfWeight(uint64_t S, uint64_t T); private: // Shadow Instruction::setInstructionSubclassData with a private forwarding // method so that subclasses cannot accidentally use it. template void setSubclassData(typename Bitfield::Type Value) { Instruction::setSubclassData(Value); } }; CallInst::CallInst(FunctionType *Ty, Value *Func, ArrayRef Args, ArrayReftative, ImmArg>]>; def int_x86_sse41_dpps : ClangBuiltin<"__builtin_ia32_dpps">, DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem, Commutative, ImmArg>]>; } // Vector sum of absolute differences let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse41_mpsadbw : ClangBuiltin<"__builtin_ia32_mpsadbw128">, DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], [IntrNoMem, ImmArg>]>; } // Test instruction with bitwise comparison. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse41_ptestz : ClangBuiltin<"__builtin_ia32_ptestz128">, DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty], [IntrNoMem]>; def int_x86_sse41_ptestc _f16">; def int_amdgcn_cvt_scalef32_sr_fp8_f32: AMDGPUCvtScaleBF16F16F32SRToFP4BF8F8TiedInputIntrinsic; def int_amdgcn_prng_b32 : DefaultAttrsIntrinsic< [llvm_i32_ty], [llvm_i32_ty], [IntrNoMem] >, ClangBuiltin<"__builtin_amdgcn_prng_b32">; def int_amdgcn_bitop3 : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem, IntrSpeculatable, ImmArg>]>; } // TargetPrefix = "amdgcn" // New-style image intrinsics ////////////////////////////////////////////////////////////////////////// // Dimension-aware image intrinsics framework ////////////////////////////////////////////////////////////////////////// // Helper class to represent (type, name) combinations of arguments. The // argument names are explanatory and used as DAG operand names for codegen // pattern matching. class AMDGPUArg { LLVMType Type = ty; striter opaque pointer transition is complete. LLVM_DEPRECATED("Use PointerType::get instead", "PointerType::get") PointerType *getPointerTo(unsigned AddrSpace = 0) const; private: /// Derived types like structures and arrays are sized iff all of the members /// of the type are sized as well. Since asking for their size is relatively /// uncommon, move this operation out-of-line. bool isSizedDerivedType(SmallPtrSetImpl *Visited = nullptr) const; }; // Printing of types. inline raw_ostream &operator<<(raw_ostream &OS, const Type &T) { T.print(OS); return OS; } // allow isa(x) to work without DerivedTypes.h included. template <> struct isa_impl { static inline bool doit(const Type &Ty) { return Ty.getTypeID() == Type::PointerTyID; } }; // Create wrappers for C Binding types (see CBindingWrapping.h). DEFINE_ISA_CONVERSION_FUNCTIONS(Type, LLVMTypeRef) /* Specialized opaque type conversions. */ inline Type **unwrap(LLVMTypeRef* Tys) { return reintevm/ADT/SmallVector.h" #include namespace llvm { class AllocaInst; class BasicBlock; class Function; class GlobalVariable; class Instruction; class LLVMContext; class Module; class Type; class Value; namespace fuzzerop { class SourcePred; } using RandomEngine = std::mt19937; struct RandomIRBuilder { RandomEngine Rand; SmallVector KnownTypes; uint64_t MinArgNum = 0; uint64_t MaxArgNum = 5; uint64_t MinFunctionNum = 1; RandomIRBuilder(int Seed, ArrayRef AllowedTypes) : Rand(Seed), KnownTypes(AllowedTypes) {} // TODO: Try to make this a bit less of a random mishmash of functions. /// Create a stack memory at the head of the function, store \c Init to the /// memory if provided. AllocaInst *createStackMemory(Function *F, Type *Ty, Value *Init = nullptr); /// Find or create a global variable. It will be initialized by random /// constants that satisfies \c Pred. It will also report whether this global /// variable found or created. std::pair(Val) && "Expected a ConstantInst!"); } void dumpOS(raw_ostream &OS) const override { dumpCommonPrefix(OS); dumpCommonSuffix(OS); } #endif }; // TODO: This should inherit from ConstantData. class ConstantFP final : public Constant { ConstantFP(llvm::ConstantFP *C, Context &Ctx) : Constant(ClassID::ConstantFP, C, Ctx) {} friend class Context; // For constructor. public: /// This returns a ConstantFP, or a vector containing a splat of a ConstantFP, /// for the specified value in the specified type. This should only be used /// for simple constant values like 2.0/1.0 etc, that are known-valid both as /// host double and as the target format. static Constant *get(Type *Ty, double V); /// If Ty is a vector type, return a Constant with a splat of the given /// value. Otherwise return a ConstantFP for the given value. static Constant *get(Type *Ty, const APFloat &V); st() public: static Value *create(Value *Agg, ArrayRef Idxs, InsertPosition Pos, Context &Ctx, const Twine &Name = ""); static bool classof(const Value *From) { return From->getSubclassID() == ClassID::ExtractValue; } /// Returns the type of the element that would be extracted /// with an extractvalue instruction with the specified parameters. /// /// Null is returned if the indices are invalid for the specified type. static Type *getIndexedType(Type *Agg, ArrayRef Idxs); using idx_iterator = llvm::ExtractValueInst::idx_iterator; inline idx_iterator idx_begin() const { return cast(Val)->idx_begin(); } inline idx_iterator idx_end() const { return cast(Val)->idx_end(); } inline iterator_range indices() const { return cast(Val)->indices(); } Value *getAggregateOperand() { return getOperand(getAggregateOperandIndex()); } conss). // // For a processor which doesn't support some feature(s), the schedule model // can use: // // let UnsupportedFeatures = [HaveA,..,HaveY]; // // to skip the checks for scheduling information when building LLVM for // instructions which have any of the listed predicates in their Predicates // field. list UnsupportedFeatures = []; bit NoModel = false; // Special tag to indicate missing machine model. // Tells the MachineScheduler whether or not to track resource usage // using intervals via ResourceSegments (see // llvm/include/llvm/CodeGen/MachineScheduler.h). bit EnableIntervals = false; } def NoSchedModel : SchedMachineModel { let NoModel = true; let CompleteModel = false; } // Define a kind of processor resource that may be common across // similar subtargets. class ProcResourceKind; // Define a number of interchangeable processor resources. NumUnits // determines the throughput of instructions that require the resource. // // An optional SPredicate> Ps> { // A string representing subtarget features that turn on this HW mode. // For example, "+feat1,-feat2" will indicate that the mode is active // when "feat1" is enabled and "feat2" is disabled at the same time. // Any other features are not checked. // When multiple modes are used, they should be mutually exclusive, // otherwise the results are unpredictable. string Features = FS; // A list of predicates that turn on this HW mode. list Predicates = Ps; } // A special mode recognized by tablegen. This mode is considered active // when no other mode is active. For targets that do not use specific hw // modes, this is the only mode. def DefaultMode : HwMode<"", []>; // A class used to associate objects with HW modes. It is only intended to // be used as a base class, where the derived class should contain a member // "Objects", which is a list of the same length as the list of modes. // The n-th element on the Objects list will be associated with the n-th // elemenpe0:$src1, type1:$src2); let hasSideEffects = false; let isCommutable = false; } /// RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point /// multiplication on 2 integers with the same width and scale. SCALE /// represents the scale of both operands as fixed point numbers. This /// SCALE parameter must be a constant integer. A scale of zero is /// effectively performing multiplication on 2 integers. def G_SMULFIX : GenericInstruction { let OutOperandList = (outs type0:$dst); let InOperandList = (ins type0:$src0, type0:$src1, untyped_imm_0:$scale); let hasSideEffects = false; let isCommutable = true; } def G_UMULFIX : GenericInstruction { let OutOperandList = (outs type0:$dst); let InOperandList = (ins type0:$src0, type0:$src1, untyped_imm_0:$scale); let hasSideEffects = false; let isCommutable = true; } /// Same as the corresponding unsaturated fixed point instructions, but the /// result is clamped between the min and max values representable by the /// bits of the first 2 operanrator begin() const { return InsertPoints.begin(); } const_insertpt_iterator end() const { return InsertPoints.end(); } unsigned getNumInsertPoints() const { return InsertPoints.size(); } /// @} /// Change the type of this repairing placement to \p NewKind. /// It is not possible to switch a repairing placement to the /// RepairingKind::Insert. There is no fundamental problem with /// that, but no uses as well, so do not support it for now. /// /// \pre NewKind != RepairingKind::Insert /// \post getKind() == NewKind void switchTo(RepairingKind NewKind) { assert(NewKind != Kind && "Already of the right Kind"); Kind = NewKind; InsertPoints.clear(); CanMaterialize = NewKind != RepairingKind::Impossible; HasSplit = false; assert(NewKind != RepairingKind::Insert && "We would need more MI to switch to Insert"); } }; protected: /// Helper class used to represent the cost for mapping an instruction. /// When mapp /// at to the index of the load. /// \param [in] MemSizeInBits - The number of bits each load should produce. /// /// \returns On success, a 3-tuple containing lowest-index load found, the /// lowest index, and the last load in the sequence. std::optional> findLoadOffsetsForLoadOrCombine( SmallDenseMap &MemOffset2Idx, const SmallVector &RegsToVisit, const unsigned MemSizeInBits) const; /// Examines the G_PTR_ADD instruction \p PtrAdd and determines if performing /// a re-association of its operands would break an existing legal addressing /// mode that the address computation currently represents. bool reassociationCanBreakAddressingModePattern(MachineInstr &PtrAdd) const; /// Behavior when a floating point min/max is given one NaN and one /// non-NaN as input. enum class SelectPatternNaNBehaviour { NOT_APPLICABLE = 0, /// NaN behavior not applicable. RETURNS_NAN, /// Gases that // need to be checked before the candidate is considered safe to merge. The // unsigned value is an index into the Stores vector. The indexed store is // the highest-indexed store that has already been checked to not have an // alias with the instruction. We record this so we don't have to repeat // alias checks that have been already done, only those with stores added // after the potential alias is recorded. SmallVector> PotentialAliases; void addPotentialAlias(MachineInstr &MI); /// Reset this candidate back to an empty one. void reset() { Stores.clear(); PotentialAliases.clear(); CurrentLowestOffset = 0; BasePtr = Register(); } }; bool isLegalOrBeforeLegalizer(const LegalityQuery &Query, MachineFunction &MF) const; /// If the given store is valid to be a member of the candidate, add it and /// return true. Otherwise, returns false. bool addStoreToCam(); } /// A DBG_VALUE is indirect iff the location operand is a register and /// the offset operand is an immediate. bool isIndirectDebugValue() const { return isDebugOffsetImm() && getDebugOperand(0).isReg(); } /// A DBG_VALUE is an entry value iff its debug expression contains the /// DW_OP_LLVM_entry_value operation. bool isDebugEntryValue() const; /// Return true if the instruction is a debug value which describes a part of /// a variable as unavailable. bool isUndefDebugValue() const { if (!isDebugValue()) return false; // If any $noreg locations are given, this DV is undef. for (const MachineOperand &Op : debug_operands()) if (Op.isReg() && !Op.getReg().isValid()) return true; return false; } bool isJumpTableDebugInfo() const { return getOpcode() == TargetOpcode::JUMP_TABLE_DEBUG_INFO; } bool isPHI() const { return getOpcode() == TargetOpcode::PHI || getOpcode() == TargetOpcode::G_PHI; } bool isKill() consrceValue *> ptrVal; // Fallback address space for use if ptrVal is nullptr. std::nullopt means // unknown address space. std::optional fallbackAddressSpace; int offset = 0; // offset off of ptrVal uint64_t size = 0; // the size of the memory location // (taken from memVT if zero) MaybeAlign align = Align(1); // alignment MachineMemOperand::Flags flags = MachineMemOperand::MONone; IntrinsicInfo() = default; }; /// Given an intrinsic, checks if on the target the intrinsic will need to map /// to a MemIntrinsicNode (touches memory). If this is the case, it returns /// true and store the intrinsic information into the IntrinsicInfo that was /// passed to the function. virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &, MachineFunction &, unsigned /*Intrinsic*/) const { return false; } /// Returns true it provides a default constructor that can be used at link time /// when GlobalISel is not built. /// That way, targets can still inherit from this class without doing /// crazy gymnastic to avoid link time failures. /// \note That works because the constructor is inlined. RegisterBankInfo() { llvm_unreachable("This constructor should not be executed"); } /// Get the register bank identified by \p ID. const RegisterBank &getRegBank(unsigned ID) { assert(ID < getNumRegBanks() && "Accessing an unknown register bank"); return *RegBanks[ID]; } /// Get the MinimalPhysRegClass for Reg. /// \pre Reg is a physical register. const TargetRegisterClass * getMinimalPhysRegClass(Register Reg, const TargetRegisterInfo &TRI) const; /// Try to get the mapping of \p MI. /// See getInstrMapping for more details on what a mapping represents. /// /// Unlike getInstrMapping the returned InstructionMapping may be invalid /// (isValid() == false). /// This means that the target inle different than other /// instructions. The minimum value computed in RegToStageDiff is 1 /// because we assume the Phi is needed for at least 1 iteration. /// This is not the case if the loop value is scheduled prior to the /// Phi in the same stage. This function returns the number of stages /// or iterations needed between the Phi definition and any uses. unsigned getStagesForPhi(int Reg) { std::pair Stages = RegToStageDiff[Reg]; if (Stages.second) return Stages.first; return Stages.first - 1; } public: /// Create a new ModuloScheduleExpander. /// \arg InstrChanges Modifications to make to instructions with memory /// operands. /// FIXME: InstrChanges is opaque and is an implementation detail of an /// optimization in MachinePipeliner that crosses abstraction boundaries. ModuloScheduleExpander(MachineFunction &MF, ModuloSchedule &S, LiveIntervals &LIS, InstrChangesTy InstrChanges) : Schedule(S), MF(MF), ST(MFed by the static Atoms /// variable defined on the subclasses. class AppleAccelTableData : public AccelTableData { public: /// An Atom defines the form of the data in an Apple accelerator table. /// Conceptually it is a column in the accelerator consisting of a type and a /// specification of the form of its data. struct Atom { /// Atom Type. const uint16_t Type; /// DWARF Form. const uint16_t Form; constexpr Atom(uint16_t Type, uint16_t Form) : Type(Type), Form(Form) {} #ifndef NDEBUG void print(raw_ostream &OS) const; void dump() const { print(dbgs()); } #endif }; // Subclasses should define: // static constexpr Atom Atoms[]; virtual void emit(AsmPrinter *Asm) const = 0; static uint32_t hash(StringRef Buffer) { return djbHash(Buffer); } }; /// Helper class to identify an entry in DWARF5AccelTable based on their DIE /// offset and UnitID. struct OffsetAndUnitID { uint64_t Offset = 0; uint32_t UnitID = 0; bool IsTU = false; OffsetAndUnitID() = delete;s to /// calculate the size of the basic block, or the BB section ending with it. mutable MCSymbol *CachedEndMCSymbol = nullptr; // Intrusive list support MachineBasicBlock() = default; explicit MachineBasicBlock(MachineFunction &MF, const BasicBlock *BB); ~MachineBasicBlock(); // MachineBasicBlocks are allocated and owned by MachineFunction. friend class MachineFunction; public: /// Return the LLVM basic block that this instance corresponded to originally. /// Note that this may be NULL if this instance does not correspond directly /// to an LLVM basic block. const BasicBlock *getBasicBlock() const { return BB; } /// Remove the reference to the underlying IR BasicBlock. This is for /// reduction tools and should generally not be used. void clearBasicBlock() { BB = nullptr; } /// Check if there is a name of corresponding LLVM basic block. bool hasName() const; /// Return the name of the corresponding LLVM basic block, or an empty string. StringRef getName() #include #include #include #include #include namespace llvm { namespace yaml { /// A wrapper around std::string which contains a source range that's being /// set during parsing. struct StringValue { std::string Value; SMRange SourceRange; StringValue() = default; StringValue(std::string Value) : Value(std::move(Value)) {} StringValue(const char Val[]) : Value(Val) {} bool operator==(const StringValue &Other) const { return Value == Other.Value; } }; template <> struct ScalarTraits { static void output(const StringValue &S, void *, raw_ostream &OS) { OS << S.Value; } static StringRef input(StringRef Scalar, void *Ctx, StringValue &S) { S.Value = Scalar.str(); if (const auto *Node = reinterpret_cast(Ctx)->getCurrentNode()) S.SourceRange = Node->getSourceRange(); return ""; } static QuotingType mustQuote(StringRef S) { return needsQuotes(S); } }; struct FlowStringV PBQPRAGraph = PBQP::RegAlloc::PBQPRAGraph; /// Abstract base for classes implementing PBQP register allocation /// constraints (e.g. Spill-costs, interference, coalescing). class PBQPRAConstraint { public: virtual ~PBQPRAConstraint() = 0; virtual void apply(PBQPRAGraph &G) = 0; private: virtual void anchor(); }; /// PBQP register allocation constraint composer. /// /// Constraints added to this list will be applied, in the order that they are /// added, to the PBQP graph. class PBQPRAConstraintList : public PBQPRAConstraint { public: void apply(PBQPRAGraph &G) override { for (auto &C : Constraints) C->apply(G); } void addConstraint(std::unique_ptr C) { if (C) Constraints.push_back(std::move(C)); } private: std::vector> Constraints; void anchor() override; }; } // end namespace llvm #endif // LLVM_CODEGEN_PBQPRACONSTRAINT_H //===- llvm/CodeGen/SchedulerRegistry.h -------------------------*- C++ -*-===// assert(Pos >= 1); return &DS.Stack[Pos - 1]; } bool operator==(const Iterator &It) const { return Pos == It.Pos; } bool operator!=(const Iterator &It) const { return Pos != It.Pos; } private: friend struct DefStack; Iterator(const DefStack &S, bool Top); // Pos-1 is the index in the StorageType object that corresponds to // the top of the DefStack. const DefStack &DS; unsigned Pos; }; public: using iterator = Iterator; iterator top() const { return Iterator(*this, true); } iterator bottom() const { return Iterator(*this, false); } unsigned size() const; void push(Def DA) { Stack.push_back(DA); } void pop(); void start_block(NodeId N); void clear_block(NodeId N); private: friend struct Iterator; using StorageType = std::vector; bool isDelimiter(const StorageType::value_type &P, NodeId N = 0) const { return (P.Addr == nullptr) && (N == 0 || P.Id == N); } hey must not be reserved. /// /// The default implementation of this function will only add target /// independent register allocation hints. Targets that override this /// function should typically call this default implementation as well and /// expect to see generic copy hints added. virtual bool getRegAllocationHints(Register VirtReg, ArrayRef Order, SmallVectorImpl &Hints, const MachineFunction &MF, const VirtRegMap *VRM = nullptr, const LiveRegMatrix *Matrix = nullptr) const; /// A callback to allow target a chance to update register allocation hints /// when a register is "changed" (e.g. coalesced) to another register. /// e.g. On ARM, some virtual registers should target register pairs, /// if one of pair is coalesced to another register, the allocation hint of /// the other half of the pair should be changed to point to the new register. virtual void updateR==// // // This file declares the functions that print out the LLVM IR and the machine // functions using the MIR serialization format. // //===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_MIRPRINTER_H #define LLVM_CODEGEN_MIRPRINTER_H #include "llvm/CodeGen/MachinePassManager.h" #include "llvm/Support/raw_ostream.h" namespace llvm { class MachineBasicBlock; class MachineFunction; class MachineModuleInfo; class Module; template class SmallVectorImpl; class PrintMIRPreparePass : public PassInfoMixin { raw_ostream &OS; public: PrintMIRPreparePass(raw_ostream &OS = errs()) : OS(OS) {} PreservedAnalyses run(Module &M, ModuleAnalysisManager &MFAM); static bool isRequired() { return true; } }; class PrintMIRPass : public PassInfoMixin { raw_ostream &OS; public: PrintMIRPass(raw_ostream &OS = errs()) : OS(OS) {} PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnas. unsigned InRegsParamsProcessed; public: CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl &Locs, LLVMContext &Context, bool NegativeOffsets = false); void addLoc(const CCValAssign &V) { Locs.push_back(V); } LLVMContext &getContext() const { return Context; } MachineFunction &getMachineFunction() const { return MF; } CallingConv::ID getCallingConv() const { return CallingConv; } bool isVarArg() const { return IsVarArg; } /// Returns the size of the currently allocated portion of the stack. uint64_t getStackSize() const { return StackSize; } /// getAlignedCallFrameSize - Return the size of the call frame needed to /// be able to store all arguments and such that the alignment requirement /// of each of the arguments is satisfied. uint64_t getAlignedCallFrameSize() const { return alignTo(StackSize, MaxStackArgAlign); } /// isAllocated - Return true if the specified register (or an alias) is /// alloctemplate.cpp -----------------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// #include "llvm/ADT/ArrayRef.h" #include "llvm/Support/InitLLVM.h" #include "llvm/Support/LLVMDriver.h" int @TOOL_NAME@_main(int argc, char **, const llvm::ToolContext &); int main(int argc, char **argv) { llvm::InitLLVM X(argc, argv); return @TOOL_NAME@_main(argc, argv, {argv[0], nullptr, false}); } include(ExternalProject) # llvm_ExternalProject_BuildCmd(out_var target) # Utility function for constructing command lines for external project targets function(llvm_ExternalProject_BuildCmd out_var target bin_dir stamp_dir) cmake_parse_arguments(ARG "" "CONFIGURATION" "" ${ARGN}) if(NOT ARG_CONFIGURATION) set(ARG_CONFIGURATION "$") endif(> #include std::string getMessageFor(int err) { return std::make_error_code(static_cast(err)).message(); } int main() { std::cout << getMessageFor(ENOENT) << ';' << getMessageFor(EISDIR); std::cout << ';' << getMessageFor(EINVAL) << ';' << getMessageFor(EACCES); return 0; } ") try_run(errc_exit_code errc_compiled ${CMAKE_BINARY_DIR} ${errc_test_code} RUN_OUTPUT_VARIABLE errc_result COMPILE_OUTPUT_VARIABLE errc_compile_errors) if (errc_compiled AND "${errc_exit_code}" STREQUAL "0") set(${outvar} ${errc_result} PARENT_SCOPE) else() set(${outvar} "" PARENT_SCOPE) message(NOTICE "${errc_compile_errors}") message(STATUS "Failed to get errc messages") endif () endfunction() # This CMake module is responsible for interpreting the user defined LLVM_ # options and executing the appropriate CMad virtualization traps extensionEnable Armv8.4-A Flag Manipulation instructionsEnable Armv8.0-A Floating Point ExtensionsEnable FP8 2-way dot instructionsEnable FP8 4-way dot instructionsEnable Armv9.5-A FP8 multiply-add instructionsEnable Armv8.3-A Pointer Authentication Faulting enhancementEnable Armv9.6-A base convert instructions for SIMD&FP scalar register operands of different input and output sizesEnable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit intEnable half-precision floating-point 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